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DLTS法を用いたGeゲートスタックの欠陥評価に関する研究

温, 偉辰 WEN, WEI-CHEN ウェン, ウェイチェン 九州大学

2020.09.25

概要

Si ultra large scale integration (ULSI) industry has met the limitation on scaling. To keep improving the performance of metal-oxide-semiconductor field-effect transistors (MOSFETs), changing channel materials to high mobility materials is necessary. Ge is an attracting candidate due to its high electron and hole mobilities. A high-quality gate stack is the key to the high mobility Ge MOSFET, and a GeO2 interlayer can reduce the interface traps (ITs); however, border traps (BTs) in GeO2 and/or other oxide layers remain a problem. To reduce these traps and improve the quality of Ge gate stacks, a trap characterization of Ge gate stacks is necessary. Aim of this study is to develop a BT evaluation method and characterize the Ge gate stacks by using deep-level transient spectroscopy (DLTS) with a lock-in integrator. In this study, two kinds of Ge gate stacks are characterized, and the influence of BTs and ITs on Ge p-MOSFETs are studied.

The equations of IT density (Dit) and BT concentration (Nbt) in Ge metal-oxide-semiconductor capacitor (MOSCAP) were derived for a lock-in DLTS. Since IT and BT are applicable to different equations, signal identification and separation are important. The bias selecting for measurement was clearly defined. Due to the different capture and emission mechanisms of IT and BT, Dit and Nbt show different units.

IT and BT signals were successfully separated based on their different dependences on the intensity of injection pulses, and the BTs in GeO2 were evaluated through investigating MOSCAPs with SiO2/GeO2/Ge gate stacks fabricated by thermal and plasma oxidation. By using p-type MOSCAPs, BTs at the position of 0.4 nm from GeO2/Ge interface were measured. By using n-type MOSCAPs, BTs at the position range of 2.8–3.4 nm from the GeO2/Ge interface were measured, of which Nbt varied little in the depth direction. The influences of the processing temperatures, oxidation methods, and Al-PMA on the quality of the gate stacks were clearly observed. Nbt values of both p- and n-MOSCAPs are in the same range (~1018 cm-3). Even though the Nbt value in n-MOSCAPs is not especially high, the low tunneling barrier allows the capture/emission process more aggressive. Passivation or elimination of BTs in GeO2 near the conduction band edge of Ge is essential to realize high mobility Ge n-MOSFETs.

To investigate the BTs in other oxide materials, Al2O3/GeOx/p-Ge gate stacks were characterized. Through evaluating the gate stacks with different GeOx thicknesses, the respective BTs in Al2O3, the Al2O3/GeOx interface region, and GeOx were detected. Dit near the midgap is lower in the MOSCAPs with thicker GeOx, while Dit near the valence band is lower in the MOSCAP with thinner GeOx. The Nbt in Al2O3 (6-9 × 1017 cm-3) is lower than those in GeOx (~2 × 1018 cm-3), and the highest Nbt (~1 × 1019 cm-3) was found in the Al2O3/GeOx interface region.

To study the influence of ITs and BTs on mobility, Ge p-MOSFETs with Al2O3/GeOx/p-Ge gate stacks were fabricated and analyzed. We confirmed that the ITs and the BTs near the valence band edge of Ge affect the mobility of Ge p-MOSFETs in the high-field region.

The BT evaluation method established in this study and the finding of the influence of ITs and BTs on mobility of p-Ge MOSFETs are an important step of the Ge MOSFETs improvement. The understanding may be also applicable to other materials or devices.

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