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An Analog Side-Channel Attack on a High-Speed Asynchronous SAR ADC Using Dual Neural Network Technique

Takahashi, Ryozo Miki, Takuji Nagata, Makoto 神戸大学

2023.10.01

概要

This brief presents a side-channel attack (SCA) technique on a high-speed asynchronous successive approximation register (SAR) analog-to-digital converter (ADC). The proposed dual neural network based on multiple noise waveforms separately discloses sign and absolute value information of input signals which are hidden by the differential structure and high-speed asynchronous operation. The target SAR ADC and on-chip noise monitors are designed on a single prototype chip for SCA demonstration. Fabricated in 40 nm, the experimental results show the proposed attack on the asynchronous SAR ADC successfully restores the input data with a competitive accuracy within 300 mV rms error.

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参考文献

5.

Conclusion

In this brief, the security attack on high-speed asynchronous

SAR ADCs was described. To break the symmetry characteristics of supply noise generated by the differential circuit

operations, the Dual-NN technique is proposed to construct

the dedicated NNs for sign and absolute value estimation

respectively. Silicon prototype demonstrates the proposed

dual NN-based SCA successfully discloses the input data

of asynchronous SAR ADC through multiple power supply and ground nodes with attacking accuracy of 312.05 mV.

The discovery of SAR ADC vulnerabilities in this work will

promote the development of countermeasures against the

SCA in the future. Future work can consider the application of the Dual-NN technique to an ADC integrated to a

micro-controller, which generates substrate noise that may

affect the performance of the SCA.

Acknowledgements

This paper is based on results obtained from a project,

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